Glossary
ASID (Address Space Identifier)
An 8-bit tag on every TLB entry that lets the ARM MMU cache translations for multiple address spaces simultaneously. Why context switch on Apple Silicon is so cheap.
An ASID — Address Space Identifier — is an 8-bit value the ARM MMU uses to tag every TLB entry with the address space it belongs to. Translations from different tasks can coexist in the TLB without conflict.
On x86 (pre-PCID) and on legacy ARM platforms, a context switch required invalidating the entire TLB — every cached translation became stale because they were for the old task's address space. ASIDs eliminate that cost:
- Each task is assigned an ASID at launch.
- The ASID is stored in the low bits of TTBR0 along with the page-table base.
- On context switch, XNU writes the new task's TTBR0 + ASID. No TLB flush needed.
- TLB lookups match both VA and current ASID. Old entries for other tasks are invisible.
ASIDs are a limited resource (256 on most ARMv8 implementations). When XNU runs out, it bumps the ASID generation, flushes the TLB once, and starts re-allocating from 0. This is rare in steady state.
See also: pmap, APRR/SPRR, and the Apple Silicon page tables article.