Glossary
pmap
The machine-dependent half of XNU virtual memory. Translates a vm_map into the page tables a particular CPU architecture actually walks.
The pmap ("physical map") is the architecture-specific layer that maintains the page tables a CPU uses for address translation. Each Mach task has one. While vm_map describes "this task has the range 0x100000000..0x100100000 mapped readable/writable, backed by anonymous memory," the pmap is what installs the actual entries in the hardware page tables that translate that range.
The split comes straight from Mach: machine-independent code in vm/, machine-dependent code in arm/pmap.c or i386/pmap.c.
apple-oss-distributions/xnuosfmk/arm/pmap.cThe arm64 pmap. Translation regime, TLB management, APRR/SPRR.View on GitHub(line —) apple-oss-distributions/xnuosfmk/i386/pmap.cThe x86_64 pmap.View on GitHub(line —)
On Apple Silicon, pmap also manages APRR / SPRR — Apple's hardware mechanism for fast switching of read/write vs. read/execute permissions on the same page. This is what makes JIT compilers (JavaScriptCore, Rosetta 2's translation cache) cheap on M-series chips compared to the TLB shootdown cost on Intel.
See also: vm_map, virtual memory.