Tagged: #apple-silicon

What runs in the first microseconds of a Mac boot — the SoC's Boot ROM, the Apple-signed LLB and iBoot stages, the SEP coming up alongside, and how the chain of trust starts.

The Apple SoC isn't just CPU + GPU + SEP. AOP, ANE, ISP, AMC, AMX — half a dozen secondary processors that quietly handle sensors, ML, imaging, and accelerated workloads.

How macOS's GPU driver hands off work to Apple Silicon's tile-based deferred renderer, and why unified memory makes IOSurface zero-copy across CPU and GPU.

A separate ARM core, its own OS, a hardware mailbox. Here's how the main CPU talks to the SEP, what operations cross the boundary, and why kernel exploits don't compromise FileVault.

How XNU maps virtual to physical on Apple Silicon — the ARM translation regime, multi-level page tables, ASIDs that eliminate TLB flushes, and where APRR sits in the translation pipeline.

From a MTLCommandBuffer.commit call to the shader cores running — the userspace encoder, the kernel driver's IOConnectCallMethod, the GPU firmware processor, and where commands actually dispatch.

What changed in XNU when Apple shipped its own ARM silicon — P/E cores, APRR page-permission switching, the AMX matrix coprocessor, and Rosetta 2.

How macOS keeps an Apple Silicon Mac running for 18 hours on a battery — cluster-level voltage scaling, idle gating, the pmgr driver, and the power-island architecture.

The IOKit object that lets CPU, GPU, ANE, ISP, and media engines share the same physical pages. The unifying primitive behind unified memory's performance story.