Glossary
DVFS (Dynamic Voltage and Frequency Scaling)
The technique of choosing per-cluster voltage and frequency at runtime to balance performance and power. The foundation of Apple Silicon's power efficiency.
DVFS — Dynamic Voltage and Frequency Scaling — is the runtime technique of choosing a clocked component's voltage and frequency based on current load. Higher voltage allows higher frequency; lower voltage forces a lower frequency ceiling.
On Apple Silicon, each CPU cluster (P and E) has its own DVFS table — typically 15-20 P-states ranging from a few hundred MHz at low voltage to several GHz at peak voltage.
The voltage-frequency curve is convex, which has important consequences:
- Running two cores at half speed uses less energy than one core at full speed for the same work.
- The scheduler exploits this by spreading parallelizable work across multiple cores at moderate frequency.
DVFS is driven by pmgr based on:
- Recent cluster utilization.
- Thermal headroom.
- AC vs battery state.
- QoS classes of the threads actively running.
Frequency changes complete in microseconds; voltage changes take tens of microseconds to settle (voltage must reach the target before frequency can be safely raised).
See also: pmgr, QoS class, and the Apple Silicon power management article.